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Linear feedback shift register calculator

Simulate a binary shift register from a typed seed and tap mask. Inspect output bits, states and any cycle found within 10,000 steps.

Calculator

Same length as the state. Leftmost bit is the highest register position.

Register and mask width
3
Output bits
1001110
Final state
001
Detected cycle length
7.00000000
Cycle search
Cycle starts after 0 shifts
Register steps
StepState before shiftOutput bitState after shift
1.000011.00100
2.001000.00110
3.001100.00111
4.001111.00011
5.000111.00101
6.001011.00010
7.000100.00001

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How this calculator works

The rightmost bit is emitted before each right shift. In Fibonacci mode the new left bit is the parity of the tapped state bits. Galois mode shifts first and XORs the mask when the emitted bit is 1. Here XNOR complements that parity or Galois trigger. Tap conventions differ between references, so use this stated orientation when comparing results. A cycle search is bounded at 10,000 shifts.

Formula

Fibonacci: next = (state >> 1) OR (parity(state AND mask) × 2^(width-1)). Galois: next = (state >> 1) XOR (output ? mask : 0).

Worked example

For state 001 and Fibonacci XOR mask 101, the states begin 001, 100, 110, 111. The first three output bits are 100. After seven shifts the initial state returns.

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Frequently asked questions

Do leading zeros matter?

Yes. They set the register width, so 001 and 1 describe different registers.

Does every tap mask give a maximal period?

No. A primitive feedback polynomial with a suitable non-zero XOR seed can reach 2^w - 1 states. Other masks can have shorter cycles or transients.

Can this generate secure keys?

A plain LFSR is predictable from enough output. This simulator is for studying recurrences and digital logic.

Sources

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